EDA is the smallest market covered in this series and arguably the most strategically leveraged: roughly $20 billion of software revenue gates several hundred billion dollars of chip design activity. It is also the segment where the May 2025 export-control shock proved, in the space of six weeks, both that Washington can switch off China's advanced chip design industry and that it is unwilling to keep the switch flipped. For Chinese EDA vendors, that episode was the best marketing event in the industry's history. The localization story here is real but early: domestic vendors hold perhaps a fifth to a quarter of the Chinese market by value, are strongest in point tools and analog flows, and remain years away from a certified full digital flow at advanced nodes.

The segment at a glance

EDA spans the software used to design, simulate, verify, and prepare chips for manufacturing: front-end digital (synthesis, simulation, formal verification), back-end physical design (place and route, extraction, timing signoff, physical verification), analog/custom flows, hardware-assisted verification (emulation and FPGA prototyping), manufacturing EDA (OPC, computational lithography, TCAD, yield), and the adjacent semiconductor IP business (interface PHYs, processor cores, foundation IP), which the big vendors bundle and which for several Chinese "EDA" companies is actually the larger revenue line.